The present invention relates to a semiconductor integrated circuit device (hereinbelow, simply termed "LSI") which includes a plurality of semiconductor integrated circuits adapted to operate with a low supply voltage and which has a system power source scheme permitting this LSI to interface with various interface LSI's, and a system which employs the LSI specified above.
A system power source scheme for permitting a certain LSI to simultaneously interface with both a TTL (transistor-transistor logic) interface LSI and an ECL (emitter-coupled logic) interface LSI, has heretofore been as described in "Hitachi Review", Vol. 70, No. 12, p. 80 (1988). It is schematically shown in FIG. 12. Numeral 120 designates the LSI which is simultaneously interfaceable with both the TTL and ECL interface LSI's. The TTL interface LSI 10 is fed with a 5-V supply voltage and a ground potential, while the ECL interface LSI 11 is fed with the ground potential and a -5.2-V supply voltage and also with a -2-V supply voltage for an emitter follower portion. The LSI 120 is fed with the 5-V supply voltage and the ground potential for interfacing with the TTL interface LSI 10. In addition, it is fed with the ground potential and the -2-V supply voltage and also with a -4-V supply voltage or the -5.2-V supply voltage in order to interface with the ECL interface LSI 11. In FIG. 12, it is fed with the -4-V supply voltage. The reason why the voltage -4 V is supplied here, is as stated below. If the withstand voltage of the internal circuit of the LSI 120 is 5 V or more, this LSI may be connected to the power source of -5.2 V. However, when the withstand voltage is about 4 V, the LSI 120 is connected to the power source of -4 V so as to connect the internal circuit thereof across the ground potential and the -4-V supply voltage and to operate them.
The prior-art technique mentioned above has the problem that, since the number of the power sources (exactly, supply potential lines) including the ground power source is as large as five, the wiring of the power sources is complicated to render the system costly. Moreover, since a potential difference of 9 V at the maximum is applied to the LSI 120, a problem in reliability might be posed when the withstand voltages of devices lower with the progress of microfabrication processes.
It is accordingly an object of the present invention to reduce the number of supply potential lines in an LSI system (or a system employing a semiconductor integrated circuit device) including an LSI which is simultaneously interfaceable with both a TTL interface LSI and an ECL interface LSI.
Another object of the present invention is to provide an LSI having a system power source scheme in which a certain LSI is simultaneously interfaceable with both a TTL interface LSI and an ECL interface LSI by means of a small number of supply potential lines.
Still another object of the present invention is to provide, in an LSI system including an LSI which is simultaneously interfaceable with both a TTL interface LSI and an ECL interface LSI, an LSI system having a system power source scheme which can secure the device withstand voltage of the LSI.
Yet another object of the present invention is to provide an LSI system in which a BiCMOS LSI (a hybrid LSI including bipolar transistors and complementary metal-oxide-semiconductor field effect transistors) composed of a device having a device withstand voltage less than 5 V is simultaneously interfaceable with both a TTL interface LSI and an ECL interface LSI.
A further object of the present invention is to provide a data processor in which a BiCMOS processor LSI composed of a device having a device withstand voltage less than 5 V is simultaneously interfaceable with a TTL interface LSI and an ECL interface LSI that are coexistent.
Other objects of the present invention will become apparent from the ensuing description.